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Si4320
2. Frequency Setting Command
Bit
15
1
14
0
13
1
12
0
11
f11
10
f10
9
f9
8
f8
7
f7
6
f6
5
f5
4
f4
3
f3
2
f2
1
f1
0
f0
POR
A680h
The 12-bit parameter of the Frequency Setting Command <f11 :
f0> has the value F. The value F should be in the range of 96 and
The constants C1 and C2 are determined by
the selected band as:
3903. When F is out of range, the previous value is kept. The
synthesizer center frequency f 0 can be calculated as:
f 0 = 10 MHz * C1 * (C2 + F/4000)
Band [MHz]
315
433
868
915
C1
1
1
2
3
C2
31
43
43
30
3. Receiver Setting Command
bit
15
1
14
1
13
0
12
0
11
0
10
0
9
0
8
0
7
d1
6
d0
5
g1
4
g0
3
r2
2
r1
1
r0
0
en
POR
C0C1h
Bits 7-6 select the VDI (valid data indicator) signal:
Bits 5-4 LNA gain set:
d1
0
0
1
1
g1
0
0
1
1
d0
0
1
0
1
g0
0
1
0
1
VDI output
Digital RSSI Out (DRSSI)
Data Quality Detector Output (DQD)
Clock recovery lock
DRSSI && DQD
G LNA (dB relative to max. G)
0
-14
-6
-20
Bits 3-1 control the threshold of the RSSI detector:
r2
0
0
0
0
1
1
1
1
r1
0
0
1
1
0
0
1
1
r0
0
1
0
1
0
1
0
1
RSSI setth [dBm]
-103
-97
-91
-85
-79
-73
Reserved
Reserved
The RSSI threshold depends on the LNA gain, the real RSSI threshold can be calculated:
RSSI th = RSSI setth + G LNA
Bit 0 ( en ) enables the whole receiver chain when set. Enable/disable of the wake-up timer and the low battery detector are not affected by
this setting.
Note: Clock tail is not generated when the crystal oscillator is controlled by en bit.
13
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